Hi Jan,
This is a very good question. First of all, I have not seen the issue, but I have not really looked for it. I usually use 3W 5% metal oxide resistors, often in parallel, for RE, and they tend to match extremely well.
However, the question remains an interesting one: what does the LT1166 do when RE1 is 10% different from RE2? The key thing to answering the question, I think, is that the LT1166 only enforces the law that VRE1 * VRE2 = 0.0004. It will spread the bias to whatever extent is necessary to satisfy that law. The 20 mV that is placed across each RE at idle, under no-load conditions is just one solution. Indeed, at idle under no-load, we know that IRE1=IRE2, so if RE1 differs from RE2, then VRE1 will differ from VRE2.
There is another interesting thing to beware of with regard to RE matching. The ohmic resistance looking back into the emitters of the output transistors can also put a large tolerance range on the effective RE for purposes of crossover distortion behavior. For example, the RB and current gain of the NPN and PNP output transistors will often be different. In an extreme case, if RB=5 ohms and beta=50, an effective ohmic contribution of 0.1 ohm results, which is a significant percentage of RE. If this contribution from the NPN and PNP devices is different, it can conceivably create and effective RE mismatch of greater than 10%. Note, of course, for biasing, the LT1166 only looks at the voltage across the external physical REs.
BTW, any systematic predictable difference between the NPN and PNP ohmic contributions to emitter resistance can be mitigated to some degree by employing different base stopper resistor values for the NPN and PNP transistors. I have demonstrated this in simulation, but have not implemented it in practice.
In any case, the behavior of the LT1166 and any consequent effect on distortion with deliberately mis-matched RE values would be a worthwhile experiment.
Cheers,
Bob
fast?
Hi Bob,
I don't think so. According to my sims (hope they are sufficiently accurate), the -3dB BW is only 2kHz and the unity loop gain frequency of a typical circuit with MOSFETs is about 500kHz. The fact that you need additional compensation proves that this chip is NOT adequately fast. The gate stoppers of the MOSFETs provide already a 6dB/octave roll-off. If the LT1166 was damn fast, everything would be just fine, but, apparently, that is not the case.
Cheers,
E.
Hi Bob,
I don't think so. According to my sims (hope they are sufficiently accurate), the -3dB BW is only 2kHz and the unity loop gain frequency of a typical circuit with MOSFETs is about 500kHz. The fact that you need additional compensation proves that this chip is NOT adequately fast. The gate stoppers of the MOSFETs provide already a 6dB/octave roll-off. If the LT1166 was damn fast, everything would be just fine, but, apparently, that is not the case.
Cheers,
E.
This statement leads to a question I was thinking about asking you a few days ago regarding selection of the bias voltage across Re. Do you actually measure the beta of each transistor, it's Rb (and added base stopper) to calculate the desired Vre for biasing, or do you measure distortion or some other parameter(s) in circuit to adjust the bias?
Hi Arthur,
They are inherently non-inductive (at least extremely low), available with decent precision, readily available, and inexpensive. Metal oxide works well also, but they are more often available as 2W. If necessary for power dissipation, I believe in paralleling them instead of resorting to a bulky wirewound. Many people over-size their emitter resistors, BTW. While they have to withstand fairly high current, they don't dissipate all that much. I go into this issue of RE choice in the output stage chapter in my book. Bear in mind, that, for a given amplifier power, doubling the number of output pairs with RE the same decreases dissipation of each RE by a factor of four (not two, like some might guess).
The only caveat to be aware of is power dissipation of the RE resistors if one intends to drive a 2-ohm load indefinitely with sine waves. However, such an amplifier will need multiple output pairs anyway.
Cheers,
Bob
Hi Chris,
It wasn't easy, and it took a long time. I started on the book about four years ago, initially just jotting down thoughts about things I wanted to talk about or things I wanted to learn about. I set out to write the book to capture most of the stuff I've learned over the years, much of it the kind of stuff I'd known earlier in my career or wish that I had learned from one book or two.
I decided that I would try to make some kind of an intelligent statement on just about every amplifier subject I could think of. On some things I could write a lot because I had a lot of experience. On others, I was not as strong or maybe someone else did a more thorough job. So on those I would write less. I also learned that there are a lot of things we take for granted or "know" instinctively, but which we may not have quite right, and deserve a little more research or measurement. I learned a lot from writing this book.
Then there were other subjects that cried out for coverage but which I did not have that much experience with. Class D amplifiers is a good example. There is a lot of info out there on class D, but as near as I can tell it is spread out all over the place, with no reasonably complete and coherent coverage in one place. I ended up writing four chapters on it and learning a heck of a lot in the process. And yet I know that those four chapters only scratch the surface of class D.
I also wanted a book that would be easy for the newbie to read, and yet in later chapters would go really deep. This can be a tough thing to do, and it takes more pages. But it is very satisfying to reach out to a broader audience. At the same time, explaining things to the relative newcomer also sets a strong foundation for what comes later, and even experienced designers may learn some good things there. The newbie need definitely not be afraid of this book, yet the expert need not be worried about getting bored.
As you know, I'm a big fan of SPICE, so I devoted two chapters to SPICE. The first one is on the use of LTspice. It is tutorial-like, but is power-amplifier-centric. Once again, it only really scratches the surface, but covers just about everything I do with SPICE. I hope that this chapter is one of the easiest ways for a newbie to learn SPICE. The second chapter deals with SPICE modeling. It begins with showing how to tweak existing models, then goes deep and shows how to create models for things like power transistors using information from datasheets and simple lab measurements. This chapter was inspired by Andy's work. The chapter also goes into creating models for MOSFETs, including a simplified approach to creating EKV models.
Cheers,
Bob
Hi Bob,
I figured you had a huge time investment in the book from what you had said so far. As for learning - yeah. The best way to learn is to explain the topic(s) to someone else. So you're an old hand by now.
-Chris
I figured you had a huge time investment in the book from what you had said so far. As for learning - yeah. The best way to learn is to explain the topic(s) to someone else. So you're an old hand by now.
Well, this also makes your book a reference book that will be read and re-read over the years. For instance, I will re-read my textbooks and have bought others to read. There is really no end to the basic things to pick up that your own education may have missed. Reading older texts also allow you to get into the mindset of the time. Then you can figure out why they designed things a certain way at the time. Very quickly you realize that engineers during any period (like the early 1900s) were pretty sharp cookies. This brings a respect for their work, and if you are restoring an item you tend to approach any changes with more respect for the original design. Humility.
You really are!
That's excellent, because you have probably guessed I'm a bit of a Spice Luddite. This section will be of great use to me, and probably many other older fellas.
Yes, he really helped a lot of people out. I have to say I miss him around here. Too bad it didn't work out.
-Chris
Hi Edmond,
Are you referring to the open-loop bandwidth in the common mode? The closed-loop common mode bandwidth is much larger; as with many op-amp-like circuits, the open loop bandwidth can be quite small. Or are you saying that the closed loop bandwidth in the common-mode (the bias-spreading feedback mode) is 500 kHz? 500 kHz closed-loop bandwidth for the bias-spreading loop should be plenty. Or are you saying that the compensation I am adding is bringing that closed-loop bandwidth way down?
Gate stoppers, especially large ones, do introduce an inconvenient pole, but that pole affects the global loop just as much as the bias loop. I use 47-ohm gate stoppers with gate zobel networks to get the most bandwidth from the output stage.
Cheers,
Bob
Elaborate... gate zobel networks ?? (picture ,sim, anything) I am a BJT man but I want nothing but the best for my "poor man's MOSFET" module.
OS
Bw lt1166
Hi Bob,
I was talking about the open loop response.
Both closed loop BW (-3dB) and open loop unity gain frequency are about 500kHz.
Indeed, that should be sufficient.
No.
Actually, I was a bit teasing you (if you don't mind) and I should have added a smiley to my previous post. What I meant was that if, hypothetically, the OPS had only one dominant pole, determined by the gate stoppers + MOSFET input capacitance, then you need an infinite BW of the bias controller in order to get a nice 6dB roll-off of the (common mode) loop gain.
In reality, this is of course not the case. The bias controller has a finite BW and poles too close to the ones of the OPS. IOW, because of this finite BW, you will need additional compensation. In this sense, you might say that the BW of the bias controller is insufficient.
Please, forgive me my semantics.
Cheers,
E.
Hi Bob,
I was talking about the open loop response.
Both closed loop BW (-3dB) and open loop unity gain frequency are about 500kHz.
Indeed, that should be sufficient.
No.
Actually, I was a bit teasing you (if you don't mind) and I should have added a smiley to my previous post. What I meant was that if, hypothetically, the OPS had only one dominant pole, determined by the gate stoppers + MOSFET input capacitance, then you need an infinite BW of the bias controller in order to get a nice 6dB roll-off of the (common mode) loop gain.
In reality, this is of course not the case. The bias controller has a finite BW and poles too close to the ones of the OPS. IOW, because of this finite BW, you will need additional compensation. In this sense, you might say that the BW of the bias controller is insufficient.
Please, forgive me my semantics.
Cheers,
E.
is this why we bypass the bias controller (Vbe multiplier) to connect the VAS to it's load as directly as possible over the widest range of frequencies?
Could that also be why more complex Vbe multipliers start to introduce stability problems. The bypass cap cannot submerge the Multiplier impedance variations at all frequencies.
That brings me neatly to my last Q.
Should the bypass capacitor be between the VAS and it's load with the absolute minimum of inductance between the two ends/sides, or should the bypass capacitor be between the bases of the two drivers/pre-drivers of the next stage?
Or is there an argument for caps in both locations?
This is a great question. While the 26 mV number across RE is theoretically correct for ideal transistors whose junctions are at room temperature, we all know that that is not necessarily a reflection of the real world. I take an approach that is more based on engineering judgment with few hard and fast rules.
In a highly simplified description, I power up the amplifier and adjust the bias to put about 15 mV across RE. I then let it sit and see what it does. If it is a new design I am especially careful to watch its behavior. Over some period of time I'll gradually adjust it up to a quiesecent value of about 20 mV. Then I'll run some distortion tests at 20 kHz to see how it behaves as a function of power. If it is a new design, I'll often close the loop ahead of the output stage so that I can clearly view the open-loop output stage distortion, and I'll often under those conditions look at 1 kHz THD (static crossover distortion) and look at the behavior. I'll usually seek a compromise on the high side of optimum.
There is no one right answer, especially with amplifiers whose bias stability is not great. It is easier to get to a better result if you are using ThermalTrak devices. Not only do you want to look at XO distortion at different power levels, but also at different heat sink temperatures. Also, look for where the maximum of the crossover distortion lies. If it lies at too low a power, that is probably not the best solution.
Also, if you end up with a solution that places less than about 15 mV across RE in the long-term quiescent idle state, that is also not desirable.
Check thermal stability by running the amplifier at 1/3 power until it gets pretty hot, then kill the signal and look at the voltage across RE. You don't want it to be dangerously high, especially by the time a few seconds have passed after removal of the signal. After a longer period, you may also see the bias dive into an under-biased situation. I suspect that some amplifiers sound bad because of dynamic bias thermal errors that may cause an under-bias situation. Such an amplifier might test good on the bench in ordinary static tests. Thermal dynamic bias mis-tracking is a form of memory distortion.
If this is not a new design, you can usually get away with setting the bias to the same value as the design you researched after a one-hour quiescent warmup.
I wish I could give you a more objective and quickly-converging answer, but my experience has not shown me an easy semi-blind way to do it.
If you've got a good ear, don't overlook listening tests, but NEVER risk under-bias OR overbias that might be dangerous to runaway. A good amplifier design has a reasonably good range of bias settings over which serious under-bias or dangerous over-bias can be avoided.
Cheers,
Bob
Elaborate... gate zobel networks ?? (picture ,sim, anything) I am a BJT man but I want nothing but the best for my "poor man's MOSFET" module.
OS
Hi OS,
I first used gate Zobel networks in my MOSFET power amplifier with error correction in 1983, where their use is explained. That JAES paper is available on my website at Cordell Audio: Home Page.
MOSFETs are fast devices, with equivalent fts in the hundreds of MHz. This is why local parasitic oscillations are more likely. The standard approach of using relatively large gate stopper resistors (100-500 ohms) is brute force and tends to kill the basic speed of the MOSFETs. We don't want to do that, so we need to better understand the origin of the oscillations. The device capacitances, in combination with bondwire inductances, can form Colpitts or Hartley oscillator topologies. The gate zobel network, connected from gate to ground or from gate to drain, kills the Q of the oscillator.
By using gate Zobel networks with vertical MOSFETs, I was able to use gate stopper resistors of only 50 ohms.
Cheers,
Bob
Thanks , I will read. I am still "digesting" Hawksford.
cool... smaller gate resistor will deal with the large gate capacitance better. A few more parts, but worth it.
OS
Hi Bob,
It's easy to overlook the importance of your last statement ...
Thank you for sharing Bob, Chris
It's easy to overlook the importance of your last statement ...
Over years of observation and practice, I've found this to be true. The additional point can be made that a design like this also tends to be free from those very dynamic bias problems that you pointed out. ThermalTrak parts seem to be the best answer to this problem at the moment while allowing maximum freedom in a given design.
Thank you for sharing Bob, Chris
It's not like the info is not here .. it's everwhere.. We try..
I guess some just have to learn with a pile of burnt sand $$$.. the hard way!
OS
Yes , like some designs in DIYA land where the wiper opens up and the whole OPS is "hard" overbiased to the burning amp level. I would not mention which ones , but I have seen this on commercial designs as well .
OS
Well calm and sense would dictate.